Give Me a Fish, Or, Teach Me ... LTspice Behavioural OR Gate

How do you make the symbol the easy way :

Open the one they have in Digital. Save As a copy.
Open in text editor, change SymbolType CELL to BLOCK.
Remove the Prefix and SpiceModel lines.
Add the SYMATTR SpiceLine thing to provide default values for the params.

That's it - now you know how to make your own models super easy..

For instructions, see older post on the AND gate below.

---------------------- first file, save as mdl_or.asc (schematic)
Version 4
SHEET 1 1152 680
WIRE 48 80 16 80
WIRE 560 112 448 112
WIRE 64 144 16 144
WIRE 624 160 512 160
WIRE 512 176 512 160
WIRE 240 192 128 192
WIRE 384 192 320 192
WIRE 464 192 384 192
WIRE 128 256 128 192
WIRE 368 288 352 288
WIRE 384 288 384 256
WIRE 384 288 368 288
WIRE 464 288 464 240
WIRE 464 288 384 288
WIRE 512 288 512 256
WIRE 512 288 464 288
WIRE 752 384 624 384
WIRE 384 400 256 400
WIRE 496 400 464 400
WIRE 576 400 496 400
WIRE 624 400 624 384
WIRE 64 416 16 416
WIRE 576 416 576 400
WIRE 256 432 256 400
WIRE 496 480 496 464
WIRE 576 480 576 464
WIRE 576 480 496 480
WIRE 624 480 576 480
WIRE 480 496 464 496
WIRE 496 496 496 480
WIRE 496 496 480 496
WIRE 128 576 128 336
WIRE 128 576 16 576
WIRE 256 576 256 512
WIRE 256 576 128 576
FLAG 16 144 b
IOPIN 16 144 In
FLAG 16 80 a
IOPIN 16 80 In
FLAG 16 576 g
IOPIN 16 576 In
FLAG 560 112 y
IOPIN 560 112 Out
FLAG 16 416 c
IOPIN 16 416 In
FLAG 624 160 Q
IOPIN 624 160 Out
FLAG 752 384 Qb
IOPIN 752 384 Out
FLAG 368 288 g
FLAG 480 496 g
SYMBOL bv 128 240 R0
SYMATTR InstName B1
SYMATTR Value V=if( (V(a,g) > Vth) | (V(b,g) > Vth) | (V(c,g) > Vth) , Vhigh, Vlow )
SYMBOL bv 256 416 R0
SYMATTR InstName B2
SYMATTR Value V=if( !((V(a,g) > Vth) | (V(b,g) > Vth) | (V(c,g) > Vth)) , Vhigh, Vlow )
SYMBOL res 336 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1000
SYMBOL res 480 384 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1000
SYMBOL cap 368 192 R0
SYMATTR InstName C1
SYMATTR Value 1p
SYMBOL cap 480 400 R0
SYMATTR InstName C2
SYMATTR Value 1p
SYMBOL e 624 384 R0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL e 512 160 R0
SYMATTR InstName E2
SYMATTR Value 1
TEXT 712 160 Left 2 ;params : \nVth : input transition threshold\nVhigh : output high level\nVlow : output low level

---------------------- end first file

Version 4
SymbolType BLOCK
LINE Normal -32 32 -28 32
LINE Normal -32 96 -28 96
LINE Normal 12 48 32 48
LINE Normal -32 80 -24 80
LINE Normal -32 64 -20 64
LINE Normal -32 48 -24 48
CIRCLE Normal 32 88 16 72
ARC Normal -132 8 -20 120 -32 96 -32 32
ARC Normal -80 -12 28 96 -28 96 24 64
ARC Normal -80 32 28 140 24 64 -28 32
WINDOW 0 -8 8 Left 2
WINDOW 3 -8 128 Left 2
SYMATTR Description Behavioral OR gate with complementary outputs
SYMATTR SpiceLine Vth=1.5 Vhigh=3.0 Vlow=0
PIN -32 48 NONE 0
PINATTR PinName a
PINATTR SpiceOrder 1
PIN -32 64 NONE 0
PINATTR PinName b
PINATTR SpiceOrder 2
PIN -32 80 NONE 0
PINATTR PinName c
PINATTR SpiceOrder 3
PIN 32 80 NONE 0
PINATTR PinName Qb
PINATTR SpiceOrder 4
PIN 32 48 NONE 0
PINATTR PinName Q
PINATTR SpiceOrder 5
PIN -16 96 NONE 0
PINATTR PinName g
PINATTR SpiceOrder 6

---------------------- end 2nd file (mdl_or.asy - symbol )