Saturday, February 28, 2015

Specifying Max and Min Output Voltage with LTspice VCVS

voltage controlled voltage source..

You want to set a certain gain and also a min and a max. How? You can't - not with those parameters. But, you can do it like this :

table=( min min, {min/gain} min, {max/gain} max, max, max)

You get the idea.. you're doing the PWL thing..

Where would you put this? In the Value field that you get with a right-click on the E component..

Monday, February 23, 2015

The Easiest Productivity and Mental Focus Hack

First read (heard about) this in Julie Morgenstern's "Making Work Work" about 8 years ago..

Been about a couple weeks since I decided to turn off data on my phone and only check email twice a day.

More stuff : http://www.quora.com/What-are-the-best-day-to-day-time-saving-hacks

Flashing Blue and Yellow Shield on Windows Taskbar

Can't go to other programs, can't do anything..

What to do?

CTRL-ALT-DEL gives you a menu, now pick Start Task Manager.
Once TM starts, you'll see, under applications, which one this is - select that and then click on Switch To.

Now you can interact with it.

http://www.askmefast.com/What_does_a_flashing__blue_and_yellow_shield_mean_on_my_lower_taskbar_which_stops_me_going_any_further_with_using_my_computer-qna1580513.html

Cynthia Says Yes, Now BLE is All I Can Think Of

Some say BLE is getting big. I say I want to get into BLE.

Now's my big chance..

http://www.scribd.com/doc/100590575/Bluetooth-Tutorial#scribd

http://makezine.com/psoc-maker-challenge/

http://www.cypress.com/?app=forum&id=5283&rID=106119
Man! These guys have a 1.25 mV accurate reference in an advanced CMOS process!

Sunday, February 22, 2015

Reps Reps Reps : Slope Compensation

My recommended weekly list of do it yourself reps (for power electronics guys) is :

Apply the Extra Element Theorem (EET, Middlebrook) to a real circuit
Derive the expression for the Right Half Plane Zero in a Boost regulator
Derive the expression for required linear slope compensation in a generic regulator (m1, m2, m)
Derive the equations for operation of a flyback converter
Derive the equations for operation of a forward converter

This is all about fitness - keeping your confidence level high and being confident enough with the algebraic jugglery that you can try out new what-if scenarios without getting paralyzed by the analysis.

Looking back over my professional life, I can see that, despite my memory, I haven't had much success or confidence in building systems or sub-systems of any significant depth. I think one problem is a lack of chunks. Sure, I remember facts, but the how to build isn't there.. Why? I think I failed to generate chunks by failing to spend sufficient time with a particular system and due to the poor quality of my sleep, especially in the early days of my career. As I've said often, energy and the ability to concentrate are the keys to the quality of like. Time management follows naturally.

Anyways, enough ranting - I want to give you a chunk, but how..
How can you always pull out the formula for the gain of the perturbation in duty-cycle out of thin air, like I gave you one for EET? We need a mnemonic..

Here's what's happening. You start with inductor current at I, with no perturbations, it ends up at I after going up with a slope of m1, then down with a slope of m2 after peaking at Ip. This is the same with or without slope compensation. In that ideal case, the duty cycle is D. And, you'll agree m1*D = m2*D' (where D' = 1 - D).

Real case, you had a perturbation that changed the Ip to Ip + delta_I. That also changed D to D1 (D + d).

In the next cycle, D2 is D - d2 and you want an expression for d2.

I2 = I + m1*D1*Ts - m2*D1'*Ts -- has to be true - nothing to do with Ip changing because all that's captured in D1
Now write an expression for D1 in terms of I, Ip + delta_I and the m's. Juggle it to get Ip + delta_I on the LHS. (Starting value = I, ending value = Ip + delta_I, slope is m1 + m - coz, when you implement the peak-current mode thing, the slope-comp is part of it)
Do the same for D2.
No eliminate I2, I, Ip and delta_I by keeping Ip + delta_I together - maybe just call it Ip2 and use m1*D = m2*D'

Sound easy, but how to create a mnemonic?
When you start off writing the equations, these are the LHS's to begin with :

m1*D = m2*D'
I2
D1
D2

So, if you can think of a better mnemonic, let me know..
Sherlock : A process of elimination will lead you to the jackpot and you'll strick Gold - as if you had the M1Das touch. Get it? Then, "I also did two" - I2D1D2" - " I too did two". Too lame? :)

Iron Condors 101 : Don't Give Them Your Email

http://www.wyattresearch.com/video/iron-condors-101/

When you search for "making income through covered calls" and get to Wyatt Research Andrew Crowder and Ian Wyatt..

Saturday, February 21, 2015

What is Test?

Testing of ICs in mass production is a screen between the factory and the customer.

It uses acceptable overhead (throwing away good units) to deliver an acceptable defect level (bad shipments, usually customers want 0 dppm, but for consumer electronics, 300 dppm used to be acceptable) at the customer end.

A good test implementation will use a tester of reasonable cost (whose resources are limited) to achieve the required yield with an acceptable test time.

The challenge for the test engineer is to design the test hardware (cost not critical because very few units are produced - max of about 30) to provide parametrics with required accuracy, with electrical and mechanical robustness and a test program that achieves the yield goals with acceptable cost.

Thursday, February 19, 2015

Changing Digital Cell Macro Parameters in LTspice

How to Change Logic Levels in LTspice

https://groups.yahoo.com/neo/groups/LTspice/conversations/topics/38474
http://www.electronicspoint.com/threads/how-to-change-logic-levels-in-ltspice.119681/

Documented in the builtin help under Special functions..

Vhigh, Vlow, Trise, Tfall, Ref (default 0.5*(Vhigh + Vlow) ) Td (delay) and a few more..

Now, wouldn't it be nice to see what parameters diffschmitt has?
So, despite appearances, the diffschmitt isn't really a comparator - that is, when you specify Vhigh and Vlow, don't expect the output to go HI when V(in+ , in-) > 0. That's right - V(in+, in-) needs to exceed Ref - yuck, I know.. So, to get a comparator function out of this one, you need to specify Ref = 0.

Wednesday, February 18, 2015

Open Source Digital Circuit Synthesis : Yosys

Okay, if you haven't completely made the switch to linux, you're in for some hassles, but, you should be able to get through the counter example with what you get here..

If all you want is to code simple state machines in verilog and get the circuit that you can then hand-enter into a schematic capture tool like LTspice, you're all set. Same applies to truth-tables, etc..

  1. I don't see a build for cygwin. Good news is, once you install on Windows, you can call that executable from cygwin. So, install from here..
  2. Install graphviz on cygwin - i.e., run the setup app, and, in the search box, put in graphviz and select the resulting matches to install and let it also install the dependencies. This one should be very quick.
  3. Run yosys in the directory that you have the counter.ys in as (maybe) $ /cygdrive/c/Tools/yosys-win32-mxebin-0.5/yosys.exe . When downloading from github, you go to "raw" for each file and then Save As - unless you know a smarter way - in which case, please tell me :)
  4. That's it! You can open up the pdf files to look at them..

Tuesday, February 17, 2015

Clifford Wolf > Jack Kilby

If Jack Kilby hadn't demonstrated the first IC, someone else would have. If Clifford Wolf hadn't put synthesis within the reach of the ordinary man, who knows who would have?


Used by https://www.efabless.com/

Monday, February 16, 2015

Wanna Kick Butt as a Gadgeteer? Do This

People forget Bunnie Huang is a PhD :)
Karen Field :

  1. Learn the tech that makes the net possible.
  2. Use search engines to avoid reinventing the wheel.
  3. Learn something new outside your comfort zone.
  4. Become experienced with an RTOS. Embedded Linux ain't a bad thing to pick up now..
  5. Diversify your skills and move up the stack
  6. Know your software well but always tinker with the latest processors
  7. Get comfortable with open-source software
  8. Develop a systems engineering mindset (think verification strategy, requirements, compliance early)
  9. Become great at expressing yourself in both words and graphics (mindmapping ain't bad)
  10. Learn wireless connectivity - my favourite - BLE, here I come!


Never Pull a Bee Sting Out with Your Fingers

Reasons

When you grab the part that's easy to grab, you actually squeeze the venom sac and the forces more venom out of the needle. Plus, the venom is accompanied by an alarm pheromone that attracts nestmates to the sting site and the new bees will give you more grief.

You should use tweezers to grip the needle directly and pull it out.



Sunday, February 15, 2015

How to Make a Million with LTspice

Recently, an experienced (old) engineer (circuit designer) who does consulting jobs for a living told me, "Cadence would like you to believe that you can't design ICs without their expensive tools, but you can." Pspice is enough apparently. If you can architect and farm out blocks, that's really all you need. Of course, the user experience is crappy.. compared to Virtuoso.

XFAB supports Cadence and (maybe) Mentor/Tanner. But, what if you want to do the design (schematic) without investing in tools? Is there a way?

Sure - following the architect and farm model - you just need a way to import the LTspice databases into Cadence so you can do you full-chip LVS (layout vs schematic ver) in Cadence. Yes, you're still spending - but you might be able to get a Cadence license for a just a week and knock this out..

So, what do you need - one perl script that can take XFAB's hspice model deck and generate the design kit you can use with LTSpice. You need to push a button and out comes the symbols, subcircuit definitions and model files (minor syntax edits on the input model files) and a component-browser schematic that you can use as your palette and your in business. You will have to do some editing on the symbols to make them visually different - you do want a drain-extended MOS to look different from a regular MOS, etc.. So it's not totally automatic - but you can always get there if you want - just more work upfront.

And of course, you need some skill code that can generate the Cadence schematic database taking the LTspice db as input - if you look at LTspice - it's cool - just text files. Would be nice if they had a command interpreter log and a way to do custom bindkeys for macros - that would devastate Cadence..

Saturday, February 14, 2015

Crappy, Crappy Perl : Subroutine Vars Access Globals By Default

Man, after 15+ years of using perl, you'd guess I should be aware of such a shortcoming.

You can do

sub mySub () {
    $var = 'xyz';
}

And, if there's a variable in the body called $var, you're in big trouble mate!

You *have* to use strict. Stinks..

By default, subroutine vars should be local. Anyone knows that.. Shame on your Larry..

Perl Magic with split

How come even perldoc -f split doesn't show such stuff? Surprised that python and ruby have taken over?

$s = 'JP,w,l,m,*,/cygdrive/c/Tools/LTspiceIV/lib/sym/pjf.asy'

You want to get w, l and m in an array..

@info = split( /,\s*\*\s*,/ , $s);
@info = reverse ( split( /,/ , $info[0] ) );
@info = reverse( @info[0..$#info-1] );

okay, maybe this is looking a bit contrived. But, anyway, I started, I might as well finish :

@info = ( split( /,/ , ( split( /,\s*\*\s*,/ , $s) )[0] ) )[1..10]

Okay, a bit of cheating there - you have to know your data - so that the magic "10" is big enough..
Actually, that's not a good one. DON'T USE IT.. You wish they would support [1..] with the 2nd argument omitted.

Use
@info = split( /,/ , ( split( /,\s*\*\s*,/ , $s) )[0] );
@info = @info[1..$#info];

Did you know that the range operator also behaves like a bistable flip-flop in such a case :

if( $a .. $b ) {

}

First, it returns true only if $a is true. After that, it ignores $a and only returns true if $b is true, and so on..

Here's my rookie mistake of the day (after more than a decade with perl) :

    $is_cell = 1 if $subin =~ /^\s*$/s;

When what I really want is for $is_cell to be set to 0 when the match fails. Duh!

Friday, February 13, 2015

Perl Extract All Elements of an Array Except..

The first :

@a = ( 1, 2, 3, 4);
@a[1..$#a]
gives
(2, 3, 4) (all but the first)

@a[0..$#a-1]
gives
(1,2,3) (all but the last)

Perl : Can't modify constant item in substitution (s///) at

Hmmm... for once, perl disappoints - can't it point to the right place?

Can't modify constant item in substitution (s///) at ./xx.pl line 309, near "s/(ATTR\s+Prefix[^\n]+\n)/$1SYMATTR ModelFile $name\\$device.cir/;"

Code :

        sym_raw =~ s/(ATTR\s+Prefix[^\n]+\n)/$1SYMATTR ModelFile $name\\$device.cir/;

And.. with fix :

        $sym_raw =~ s/(ATTR\s+Prefix[^\n]+\n)/$1SYMATTR ModelFile $name\\$device.cir/;

Now, why couldn't it flag the LHS instead of talking about the substitution?



Nobel Prize 2016 : Alroy Almeida, Jesus Zozaya, James Pickard, Katarina Ilic

We made the decision to move to Shen Zhen, the electronics capital of the world.
"This allowed us to nail down our supply chain and manufacturing processes."

My buddy who's tired of haggling with the Chinese PCB manufacturers might have found his answer..

What made is possible - a background in nanotechnology. Hmm...

Seen anything great come out of Georgia Tech's behemoth nanotech building yet?

https://www.kickstarter.com/projects/voltera/voltera-your-circuit-board-prototyping-machine?ref=nav_search

Tuesday, February 10, 2015

LTspice Drives PC Sales

I have one experienced consultant tell me he recently bought a Core i7 laptop just because LTspice runs faster on it.

Says it's the gold standard these days among hardware guys.. Hmmm....


http://www.scribd.com/doc/54713644/Kielkowski-Inside-SPICE#scribd

Monday, February 09, 2015

Use Doxygen

A coder today suggested people learn to use Doxygen because it told him things about his code that he did not know.

Nice.

Good job there by Dimitri van Heesch aus die Niederlanden.

Sunday, February 08, 2015

Rohde Recommends : The ARRL Handbook for the Radio Amateur

Says the chapter on oscillators is a good one...

Here's a treasure trove : http://72.29.85.210/~radioama/old_books/

yoga.org.nz download page

http://yoga.org.nz/yoga_vidoes_download1.htm

Wonder why this has to be so hard. Just make the YoutTube thing downloadable.. Hmph

Anyways, you got the 56 MB file and now (it's actually not that big, but..) you want to put just the audio on your phone because you've seen the poses so many times, all you need is the timing.

There's the rub. Sure, with all the stuff they already have in XP, M$ should be able to give you a free audio ripper on Win7, but, of course, they won't.

So, google it is - and a minefield it is - no clear answer. Looks like Freemake is the winner :

http://answers.microsoft.com/en-us/windows/forum/windows_7-pictures/extract-audio-from-a-wmv-file-to-wav-or-aiff/f123e7c8-7f6a-48a2-8340-ca066691bc4b

True - be very careful during the install - you CANNOT (SHOULD NOT) proceed with the Express (recommended) config which will mess up your internet browsers by installing Add Ons - duh, how else is Ellora Assets Corp to survive other than by getting cash from 3rd parties on a per-install basis?

1) Custom installation, both boxes unchecked... next
2) DO NOT install Wajam (I do not accept)
3) DO NOT install Safer Browser (I do not accept)

And, worked - I think - but the audio quality at the end of the day seems a bit disappointing - could be perception.. hmmm, the more I think of it - a lot of cut outs... yuck. But, good enough. Worth my $1 donation..

Then, opens in Audacity - and huge disappointment - can't save as a freaking mp3 and, save as WAV, the 17 MB is now 62 MB!!! WT*!! To save mp3 it needs something called Lame. How lame!

Jeez! Freeware!! Why can't they do it right? Can't they see how big the file was that they started with? It's exporting 128 kbps! Another pain in the * trying to search for how to knock the sample rate down. *ds..

File > Export Audio > Options (Instead of Save) - and then, if you try 16 kbps, it tells you that that's not compatible with a project sample rate of 44 ksps. Ha ha :)

Saturday, February 07, 2015

Concept to Product in Months : I've Wasted My Life :)

Teja Philipp and Philipp Engel :

http://media.ccc.de/browse/congress/2014/31c3_-_6589_-_en_-_saal_6_-_201412281730_-_mr_beam_goes_kickstarter_-_teja_philipp_-_philipp_engel.html#video

Looks like knowing software is a big deal - just knowing the problem decomposition is a big deal...
Super job! I'm an IC designer and I don't feel like an engineer. These 2 guys are code-junkies and they built this with their hands!
How did they go to manufacturing?
You see these guys and you think - ya, it's possible for white guys to be as skinny as Indians.
They ordered $7k worth of stepper motors through Alibaba.
4 prototypes for the PCB.. (Arduino shield)
4 3D printers spent 4 months 3D printing the parts! WT*? Man, these guys are unstoppable!
Looks like they got skinny from the workout they got from crimping cables and drilling wood..
260 kits total to be delivered.. Too much work involved in vetting suppliers on Alibaba who promise stuff they can't deliver..
350 backers, but they had to trade emails with about 1600 people!

Bunnie Sums Up the Chinese Threat

https://www.youtube.com/watch?v=msrTR3hNDQM
(Talking about Fernvale)
Slides : http://www.bunniefoo.com/fernvale/fernvale-31c3.pdf
Other 31C3 talks from 2014 : http://media.ccc.de/browse/congress/2014/

Friday, February 06, 2015

Middlebrook's EET (Extra Element Theorem) Without Tears

Short and sweet.
Want a mnemonic? "The Prisoner of Zenda" - n before d basically. How about whether it's Z_n/Z or Z/Z_n? Just think what you need to get when you put Z = infinity and you're done.. Easy? See... (BTW, I strongly suspected Middlebrook had an English streak to him..) In his words :
  • What's Z_d : It's the driving point impedance looking into the port where you're going to connect Z, with the input port shorted.
  • What's Z_n : It's the impedance looking into the the port where you're going to connect Z, with the output port nulled for any value of the input. No matter what the input port voltage is, the output port voltage is 0 - which is not the same as shorting it to ground.
What about an input impedance? In that case, you might be pulling your hair out for Zn. If you trust the pros (Dr. V) just calculate the Z looking in with the test (port where Zin is determined) port open and you're done.. For a Zin function, the input and output ports are the same. What's the logic though? 

Thursday, February 05, 2015

State-Diagram of the O-S FAN4860


The Best Salesman In the World

Kaufman is new in town and looking for a job. He goes to a cloth merchant.
I am new in town. Let me sell your wares.
We don't need more salesmen now.
I am the best salesman in the world. Give me something to sell and you can hire me if I succeed.
Okay, I have a set of trouser pieces. You can try your best with them.
Kaufman comes back in a week and says, I realized I'm only the second best salesman in the world. The best one is the one who sold you these pieces.

BTW, one guy once advised me to read Og Mandino's book, "The Greatest Salesman in the World."

If you want to jump straight to the scrolls, they are here. Instructions are in the first scroll..

http://mnsales.com/wp-content/uploads/2013/01/Og-Mandino-10-Scrolls.pdf

LTspice Help : Viewing Internal SubCircuit (Subckt) Voltages

kudos : http://www.edaboard.com/thread209216.html

Tools > Control Panel > Save Defaults and check "Save Subcircuit Node Voltages"

Giving ViaDesigner a Try

Had seen a request from Triad a year ago asking for people to evaluate them. Never heard back..

Now, the stuff is available as a free download on Cnet. What gives?

The claim is, if you use their Via-Configurable-Array (VCA), you get your IC Design done faster, safer, simpler and less expensively.

It's an 800 MB download by the way..

Who did they partner with to integrate SPICE you wonder? BTW, heard that Chris Collins managed to grind TIspice to the ground. How did he do so well I asked. Answer : He's very good at managing up. They got a great deal from Cadence apparently - unlimited licenses or something - and the integration with AMS is better, so win-win.

Verdict on installation : Yuck, yuck, yuck! They don't warn you the MG's SystemVision will be installed. And when MG asks you for a license key, what the * are you supposed to do?

Then, you try to run : Super-yuck!

Unable to instantiate DPROJMANLib.ProjectManager COM object. Ensure dprojman.dll is registered.

*ds! What the hell is Reid Wender trying to prove?

Getting Serious about the FAN4860

When it comes to performance of a boost, what do you target?
IQQ - no load input current - as low as possible.
Vout : Accuracy of the output voltage - as good as possible. They're good on the high side, but bad on the low side (Eg. 4.85 - 5.05 - 5.15). What gives - obviously it's something to do with the load-regulation not being corrected.
Vout-ripple : Ripple in the output - as low as possible. Looks like they're about 2 mV p2p with 5 mA and about 10 mV p2p with 200 mA. What giveth?
f_sw : Tolerance of switching frequency - as good as possible - not really an issue if you use a fixed-frequency architecture, but a huge issue otherwise.. They're saying they use a min-TON and computed TOFF. Really? Hence no plots of frequency as a function of load or other things.. Hmm.. What if the customer always wants f_sw to be above a certain value so he doesn't have to worry about interference.
They say the current-source soft-start mode LIN1 is exited for LIN2 mode if Vout is less then VIN-1V after 16 clock counts from start of LIN1. Really? How about telling us what clock this might be?

Cool part - when you design, you have to think about how you're going to test everything with such reduced pin-cout. What can you do with the VOUT pin, the EN pin?
What bells and whistles can you add for the customer? FCS talks about fault detection during startup - but how do they signal the faults? One thing that comes to mind is a simple pull-down current source on the EN pin - 1 uA for one thing, 5 uA for another, etc..

The functional description has just enough detail to leave you tantalizingly unsure what they mean. From reading the PFM Mode section, you get that ON time is when the Low-Side (LSD) switch is ON. (Coz that's how you do a skip-mode - get IL large and let it dump into the Vout so your switching frequency is really low). Of course, this opens up the question of how they ensure the customer can override the skip-mode and force PWM operation. Hmmm.. What do they mean by current-mode modulation?