When it comes to performance of a boost, what do you target?
IQQ - no load input current - as low as possible.
Vout : Accuracy of the output voltage - as good as possible. They're good on the high side, but bad on the low side (Eg. 4.85 - 5.05 - 5.15). What gives - obviously it's something to do with the load-regulation not being corrected.
Vout-ripple : Ripple in the output - as low as possible. Looks like they're about 2 mV p2p with 5 mA and about 10 mV p2p with 200 mA. What giveth?
f_sw : Tolerance of switching frequency - as good as possible - not really an issue if you use a fixed-frequency architecture, but a huge issue otherwise.. They're saying they use a min-TON and computed TOFF. Really? Hence no plots of frequency as a function of load or other things.. Hmm.. What if the customer always wants f_sw to be above a certain value so he doesn't have to worry about interference.
They say the current-source soft-start mode LIN1 is exited for LIN2 mode if Vout is less then VIN-1V after 16 clock counts from start of LIN1. Really? How about telling us what clock this might be?
Cool part - when you design, you have to think about how you're going to test everything with such reduced pin-cout. What can you do with the VOUT pin, the EN pin?
What bells and whistles can you add for the customer? FCS talks about fault detection during startup - but how do they signal the faults? One thing that comes to mind is a simple pull-down current source on the EN pin - 1 uA for one thing, 5 uA for another, etc..
The functional description has just enough detail to leave you tantalizingly unsure what they mean. From reading the PFM Mode section, you get that ON time is when the Low-Side (LSD) switch is ON. (Coz that's how you do a skip-mode - get IL large and let it dump into the Vout so your switching frequency is really low). Of course, this opens up the question of how they ensure the customer can override the skip-mode and force PWM operation. Hmmm.. What do they mean by current-mode modulation?
No comments:
Post a Comment