Open Source Digital Circuit Synthesis : Yosys

Okay, if you haven't completely made the switch to linux, you're in for some hassles, but, you should be able to get through the counter example with what you get here..

If all you want is to code simple state machines in verilog and get the circuit that you can then hand-enter into a schematic capture tool like LTspice, you're all set. Same applies to truth-tables, etc..

1. I don't see a build for cygwin. Good news is, once you install on Windows, you can call that executable from cygwin. So, install from here..
2. Install graphviz on cygwin - i.e., run the setup app, and, in the search box, put in graphviz and select the resulting matches to install and let it also install the dependencies. This one should be very quick.
3. Run yosys in the directory that you have the counter.ys in as (maybe) $ /cygdrive/c/Tools/yosys-win32-mxebin-0.5/yosys.exe . When downloading from github, you go to "raw" for each file and then Save As - unless you know a smarter way - in which case, please tell me :)
4. That's it! You can open up the pdf files to look at them..